1. Field of the Invention
The invention relates generally to methods for fabricating and assembling silicon structures. In particular, the invention relates to fabricating silicon fixtures for supporting silicon wafers during thermal processing.
2. Technical Background
In the evolution of commercial fabrication of silicon wafers, larger and larger wafers are being processed in larger and larger batches at the same time that feature sizes are decreasing to 0.18 xcexcm and less. Such processing has imposed increasingly more demanding requirements on the performance of processing equipment, as well as that of the wafer handling and carrying mechanisms needed to move, transport, and retain the wafers during processing. These requirements include temperature uniformity and contamination, whether of impurities and/or particles.
In many chemical and thermal processing operations, it is often necessary to hold the wafers in precise positions during various processing steps, and in particular during annealing, dopant diffusion, or chemical vapor deposition simultaneously performed on many wafers. Many of these processes are performed at moderately high to very high temperatures. The medium temperatures are in the range of 400 to 700xc2x0 C. while the high temperatures are in the range of 1000 to 1380xc2x0 C. The upper limit is substantially limited by the melting point of silicon at about between 1412xc2x0 C. and 1416xc2x0 C., further taking into account any significant softening at just below the melting point.
Support fixtures are typically employed to support a relatively large quantity of wafers in an oven or other high-temperature reactor for such thermal processing. A xe2x80x9cboatxe2x80x9d is the term usually applied to a fixture holding multiple wafers with their principal surfaces extending in approximately vertical planes with the wafers spaced along a horizontal axis. A boat is used in a horizontal furnace. A xe2x80x9ctowerxe2x80x9d is the term usually applied to a fixture holding multiple wafers with their principal surfaces lying within generally horizontal planes with the wafers spaced along a vertical axis. A tower is used in a vertical furnace. The term xe2x80x9ctowerxe2x80x9d will be used in the following discussion because they are most common in large-scale commercial fabrication processes, but most of the comments apply equally well to boats.
In the past, most towers and boats have been formed of quartz, which is relatively inexpensive and relatively clean. However, quartz will devitrify at higher temperatures to form crystallites. Any such crystallites can be easily dislodged from the amorphous matrix rendering the support fixtures dirty when used at higher temperatures. Also, quartz tends to sag at somewhat higher temperatures, which makes it unsuitable for large structures required for processing a large number of large wafers. Even at lower temperatures, devitrified quartz has a tendency to fracture catastrophically as cracks propagate in the quartz. Data from the fab lines have shown that the number of particles added from a quartz tower increases with the number of runs in a pattern such as that illustrated in FIG. 1. Up to about ten runs, the number of particles increases to a level of about 50 per 200 mm wafer, which is barely tolerable. The particle count is maintained at this level up to about 40 runs, at which point the production of particles quickly becomes unacceptable. In light of these data and anticipated variations in the performance, it has become common practice to substitute a fresh tower after about 30 runs and to discard the old fixture. While this practice may be economically justified in view of the value of processed wafers, it represents a large expense.
As a result, towers for high-temperature applications are often formed of silicon carbide (SiC), which is usually sintered, so devitrification is not a problem, and its melting point is a relatively high 2830xc2x0 C. However, since sintered silicon carbide is almost always contaminated with metals, it is common to coat the sintered SiC with a thin layer of SiC deposited by chemical vapor deposition (CVD), which is much cleaner. The CVD coating makes SiC fixtures much more expensive. Also, even a single pinhole in the CVD coating is likely to render the entire tower unusable.
Suggestions exist in the literature for forming towers from silicon. By fabricating wafer holding structures from the same material as the wafers themselves, that is, silicon, the possibility of contamination and deformation is reduced. The silicon structure would react to processing temperatures, conditions, and chemistry in exactly the same way that the wafers would, thus greatly enhancing the overall effective useful life of the structure. Silicon is widely available in the larger sizes required for towers as either monocrystalline or polysilicon grown by the Czochralski (CZ) method.
Czochralski monocrystalline silicon is the type used as wafers in semiconductor integrated circuits and consists of essentially a single crystal of silicon. The Czochralski single crystals are called ingots and are shaped generally as rods with diameters of extending to 200 and 300 mm, the sizes of the most commercially important wafers, and lengths of 1 m or more. The thin wafers are sawn from the monocrystalline ingot. In the Czochralski method, silicon source material typically in the form of virgin polycrystalline silicon to be described later is heated in a crucible to above silicon""s melting point of about 1416xc2x0 C., perhaps with intentionally introduced dopants. A single crystal of silicon is nucleated on a small seed crystal placed at the surface of the melt, and the growing ingot is very slowly pulled from the melt in the form of a single-crystal rod.
CZ polycrystalline silicon, often referred to as semi-single crystal silicon, is grown by substantially the same method and has virtually the same local structure as monocrystalline silicon but is composed of separate crystallites of substantial sizes. The crystallites have sizes of the order of 1 mm to above 100 mm and are separated by grain boundaries. Such CZ polysilicon is believed to be the conventionally presented polysilicon in the context of structural members. Whether CZ silicon is grown in monocrystalline or polycrystalline form depends in large part upon its drawing rate from the melt.
CZ silicon, whether monocrystalline or polycrystalline, is typically grown with heavy metal impurities of somewhat less than 1 part per million (ppm), but carbon and nitrogen may be present in concentrations between 1 and 7 ppm, while oxygen is present in concentrations between 10 and 25 ppm. The crystallites of CZ polysilicon typically have very similar orientations with respect to each other. Polysilicon is often grown as thin layers in silicon integrated circuits by chemical vapor deposition, but such films are not directly applicable to the invention.
To date, however, such silicon towers have not found acceptance in the industry. Silicon is perceived as being extremely fragile and difficult to fuse. Other methods of securing together silicon pieces are unlikely to survive the highest required wafer processing temperatures. It is believed that the standard assembly techniques used with silicon members have been unsatisfactory and has resulted in flimsy structures unsuited to commercial use. Due to these perceptions, known silicon structures are widely believed to be delicate at best, and unreliably flimsy at worst. Consequently, they have failed to receive broad commercial acceptance.
It can be seen that a need exists for a method of fabricating monocrystalline and polycrystalline silicon structural members for use in the manufacture of semiconductor wafers and the like that will eliminate the disadvantages of known silicon structures while retaining the advantages of silicon as a structural material.
It can thus be seen that the need exists for clean, strong, and reliable support members for wafer processing fixtures that will reduce shadowing and contamination while providing stable and precise wafer support.
Ranaan and Davis in U.S. patent applications Ser. Nos. 09/292,491, 09/292,495, and 09/292,496, all filed Apr. 15, 1999 have disclosed silicon towers formed of either monocrystalline or polycrystalline silicon and have further described methods of securing together pieces of the tower. These patents are incorporated herein by reference in their entireties. The present inventions are improvements on those disclosures.
A method of fabricating and assembling silicon structures, especially silicon fixtures, particularly a silicon tower, used to support multiple silicon wafers in parallel spaced apart relationships during thermal processing. The preferred configuration includes multiple silicon legs joined at their ends to silicon bases. The legs may have lateral slots cut in the legs to form, in the case of vertically extending towers, projecting teeth to support the wafers horizontally or, in the case of vertically extending boats, a rack to hold the wafers vertically.
In one aspect of the invention the legs and preferably also the bases are machined from virgin polysilicon formed by the chemical vapor deposition of silicon, preferably from monosilane. The silicon material advantageously has an impurity concentration of metal components of less than 1 parts per billion and a resistivity of greater than 1000 ohm-cm.
The legs may have a larger back portion and a smaller projecting portion for supporting the wafers, thus minimizing thermal shadowing. The projecting portion may be inclined upwardly at between 1xc2x0 and 3xc2x0 and have a level support portion on its end.
The support portion of the legs is advantageously polished to a mirror finish. The projecting portion advantageously supports the wafer at between 69% and 72% of the wafer radius to minimize stress on the wafer.
Virgin polysilicon may be machined after it has been annealed above its plasticizing temperature of 1025xc2x0 C. or alternatively at more than 100xc2x0 C. above the thermal CVD temperature used in forming the virgin polysilicon.
Silicon parts are preferably annealed in an oxygen ambient after machining and before joining. Silicon parts may be joined by applying a spin-on glass composition to the joining surfaces. A spin-on glass includes silicon and oxygen components that are converted to a silicate glass when annealed to above 600xc2x0 C. Preferably, the joined parts are annealed at above 1025xc2x0 C.
Advantageously, the annealed joined parts of a wafer support fixture are subjected to sub-surface work damage prior to use in a wafer processing furnace.